Standby Power Reduction Techniques for Asynchronous Circuits with Indeterminate Standby States
نویسنده
چکیده
In the literature, some schemes were proposed to combine Multi-Threshold CMOS (MTCMOS) with asynchronous circuits to reduce standby power consumption. However, all of these can only be applied to asynchronous circuits in which the values of all signals can be determined in the standby state. As a result, their applications are limited. To solve this problem, this paper develops standby power reduction techniques which not only combine MTCMOS with asynchronous circuits, but also can be applied to asynchronous circuits with indeterminate standby states. Compared to asynchronous circuits implemented with all regular threshold transistors, the proposed implementation has significantly less standby power, reasonable speed penalty, and negligible area overhead. Keywords-asynchronous circuits; Multi-Threshold CMOS (MTCMOS); NULL Convention Logic (NCL)
منابع مشابه
Duet: an accurate leakage estimation and optimization tool for dual-Vt circuits
We present a new approach for the estimation and optimization of standby power dissipation in large MOS digital circuits. We first introduce a new approach for accurate and efficient calculation of the average standby or leakage current in large digital circuits by introducing the concepts of “dominant leakage states” and the use of state probabilities. Combined with graph reduction techniques ...
متن کاملOptimal Placement and Sizing of DG in Distributed Network using NSGA-II based on Cold-Standby Strategy
Abstract: in this Paper, Optimal placement and sizing of DGs is considered as an engineering optimization problem. Due to integration and influence of DGs in distributed networks, optimal location and sizing of them are done based on objective functions such as: voltage profile improvement, power loss reduction, reliability improvement, restraining the increase of power plant, etc. These goals ...
متن کاملNew Hybrid Digital Circuit Design Techniques for Reducing Subthreshold Leakage Power in Standby Mode
In this paper, four new hybrid digital circuit design techniques, namely, hybrid multi-threshold CMOS complete stack technique, hybrid multi-threshold CMOS partial stack technique, hybrid super cutoff complete stack technique and hybrid super cutoff partial stack technique, have been proposed to reduce the subthreshold leakage power dissipation in standby modes. Techniques available in literatu...
متن کاملSimultaneous Optimization of Standby and Active Energy for Sub-threshold Circuits
Increased downscaling of CMOS circuits with respect to feature size and threshold voltage has a result of dramatically increasing in leakage current. So, leakage power reduction is an important design issue for active and standby modes as long as the technology scaling increased. In this paper, a simultaneous active and standby energy optimization methodology is proposed for 22 nm sub-threshold...
متن کاملLow Leakage Asynchronous PP based Single Ended 8T SRAM bit-cell at 45nm CMOS Technology
Low power SRAM memory designs has become challenging for portable device applications. Semiconductor/ VLSI industry growth has exponentially demanding low leakage power SRAM designs for high performance chips and microprocessors. To get optimized standard cell memory design for battery operated devices at deep sub micron CMOS technology, a low leakage Asynchronous 8T SRAM is proposed. In this p...
متن کامل